forked from mirrors/qmk_userspace
ChibiOS conf migrations... take 9 (#11598)
* ChibiOS conf upgrade for akegata_denki/device_one akegata_denki/device_one - 0d9f891416decbbb533c6c1147632ef7c55a2d9f * ChibiOS conf upgrade for ergodox_stm32 ergodox_stm32 - 72aeab1612ef73555a73dd60d005e671a90d7e2f * ChibiOS conf upgrade for jm60 jm60 - cc75e97727fadd939be4bdf7fa3714320465d3ef * ChibiOS conf upgrade for matrix/m20add matrix/m20add - b0dee0b4e8c0a94d55fea51c8699972f15483209 * ChibiOS conf upgrade for matrix/noah matrix/noah - 57a1c09cd24716863ce862e0b9cbca2a9c6fcebf * ChibiOS conf upgrade for nibiria/stream15 nibiria/stream15 - 610b151b02f5cac681c65fbd3f94a12312f99b82 * ChibiOS conf upgrade for xiaomi/mk02 xiaomi/mk02 - f92fcee777acc159c0af268e88b751fd1e33f74f
This commit is contained in:
Nick Brassel
GitHub
parent
82a875056c
commit
e0e67df933
15 changed files with 415 additions and 8612 deletions
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/*
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ChibiOS - Copyright (C) 2021 Matt Clendaniel
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _MCUCONF_H_
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#define _MCUCONF_H_
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/*
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* STM32F0xx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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/* Copyright 2020 QMK
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*
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* IRQ priorities:
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* 3...0 Lowest...Highest.
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define STM32F0xx_MCUCONF
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// #define STM32F070xB
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/*
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* HAL driver system settings.
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* This file was auto-generated by:
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* `qmk chibios-confupdate -i keyboards/nibiria/stream15/mcuconf.h -r platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h`
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*/
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#define STM32_NO_INIT FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI_ENABLED TRUE
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#define STM32_HSI14_ENABLED TRUE
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#define STM32_HSI48_ENABLED FALSE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE STM32_PPRE_DIV1
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#define STM32_ADCSW STM32_ADCSW_HSI14
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_ADCSW STM32_ADCSW_HSI14
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#define STM32_USBSW STM32_USBSW_HSI48
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#define STM32_CECSW STM32_CECSW_HSI
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#define STM32_I2C1SW STM32_I2C1SW_HSI
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#define STM32_USART1SW STM32_USART1SW_PCLK
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_USE_ADC1 FALSE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
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#pragma once
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/*
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* EXT driver system settings.
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*/
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#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
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#include_next <mcuconf.h>
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 FALSE
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#define STM32_GPT_USE_TIM2 FALSE
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#define STM32_GPT_USE_TIM3 FALSE
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#define STM32_GPT_USE_TIM14 FALSE
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#define STM32_GPT_TIM1_IRQ_PRIORITY 2
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#define STM32_GPT_TIM2_IRQ_PRIORITY 2
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#define STM32_GPT_TIM3_IRQ_PRIORITY 2
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#define STM32_GPT_TIM14_IRQ_PRIORITY 2
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#undef STM32_I2C_USE_I2C1
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#define STM32_I2C_USE_I2C1 TRUE
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_USE_I2C1 TRUE
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#define STM32_I2C_USE_I2C2 FALSE
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#define STM32_I2C_BUSY_TIMEOUT 50
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#define STM32_I2C_I2C1_IRQ_PRIORITY 3
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#define STM32_I2C_I2C2_IRQ_PRIORITY 3
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#define STM32_I2C_USE_DMA TRUE
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#define STM32_I2C_I2C1_DMA_PRIORITY 1
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#define STM32_I2C_I2C2_DMA_PRIORITY 1
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#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
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#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
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#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
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#undef STM32_PWM_USE_TIM3
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#define STM32_PWM_USE_TIM3 TRUE
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_USE_TIM1 FALSE
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#define STM32_ICU_USE_TIM2 FALSE
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#define STM32_ICU_USE_TIM3 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 3
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#define STM32_ICU_TIM2_IRQ_PRIORITY 3
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#define STM32_ICU_TIM3_IRQ_PRIORITY 3
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#undef STM32_SPI_USE_SPI2
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#define STM32_SPI_USE_SPI2 TRUE
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_USE_ADVANCED FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 TRUE
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#define STM32_PWM_TIM1_IRQ_PRIORITY 3
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#define STM32_PWM_TIM2_IRQ_PRIORITY 3
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#define STM32_PWM_TIM3_IRQ_PRIORITY 3
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USE_USART1 FALSE
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#define STM32_SERIAL_USE_USART2 FALSE
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#define STM32_SERIAL_USART1_PRIORITY 3
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#define STM32_SERIAL_USART2_PRIORITY 3
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_USE_SPI1 FALSE
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#define STM32_SPI_USE_SPI2 TRUE
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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#define STM32_SPI_SPI1_IRQ_PRIORITY 2
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#define STM32_SPI_SPI2_IRQ_PRIORITY 2
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#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
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#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
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#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
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/*
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* ST driver system settings.
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*/
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#define STM32_ST_IRQ_PRIORITY 2
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#define STM32_ST_USE_TIMER 2
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/*
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* UART driver system settings.
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*/
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#define STM32_UART_USE_USART1 FALSE
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#define STM32_UART_USE_USART2 FALSE
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#define STM32_UART_USART1_IRQ_PRIORITY 3
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#define STM32_UART_USART2_IRQ_PRIORITY 3
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
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/*
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* USB driver system settings.
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*/
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#define STM32_USB_USE_USB1 TRUE
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#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
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#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
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#endif /* _MCUCONF_H_ */
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